This invention is directed to a microelectronic package for the protection, housing, cooling and interconnecting of a microelectronic chip. The package is made of a plurality of ceramic layers each of which carries a particular electrically conductive pattern and which have interior openings therein so as to provide recesses in which the chip and discrete capacitors can be located and connected. The package may include locations for discrete components such as resistors and capacitors. In a computer and similar circuits, the actual processing of information is done entirely by the circuitry on the microelectronic chips, and this would lead one to believe that the functions of packaging are simply to protect the chips, interconnect them with other devices, and to distribute electric power. From this view, the nature of the packaging would not appear to have much influence on the function of the machine. However, in many high-speed data processing units, packaging technology is an important factor which determines or limits performance, cost and reliability. One reason packaging has become so important is the imperative to make the central elementary computing system exceedingly compact. Improvements in the design and fabrication of microelectronic devices have greatly increased the number of logic functions that can be placed on a single chip as well as the speed at which logic functions are performed. As a result, a major source of delay in the central processing unit of many computers is the time required for a signal to pass between chips. In order to reduce this delay, the chips must be placed close together. Putting many chips into a small volume challenges packaging technology in several ways. There is little space available for the many conductors required to distribute power and information bearing signals on the chips. In addition, the properties of this network of conductors must be such as to minimize the distortion of signals. Furthermore, such a dense array of chips gives off sufficient heat that cooling is an important consideration. Signal delays occur because of finite line length of lines interconnecting chips as well as within capacitive, resistive or inductive circuit discrete devices which are connected into a portion of the circuit. Signal delays are increased when such interconnections are made outside of the package. Extended leads of this nature reduce circuit response time. Another important feature of a package into which a circuit chip is to be inserted is the interconnection between the chip and the package. It must be convenient within the package so that accurate interconnection can be made. Furthermore, the connections on the exterior of the package must also be located in such a manner that the package can be appropriately interconnected into the remainder of the circuit. Accordingly, there is need for a microelectronic package which satisfies the diverse requirements of the electronic system in which its contained chip will be employed.